Channel stops have been used in semiconductor devices to isolate devices from one another. To achieve good active area density, the channel stop implantation dose is self-aligned to the active moat edge. However, high sidewall junction capacitance at 0 to Vdd bias (C.sub.JS) is experienced, which causes higher power dissipation and reduced switching speed.
To overcome the problem, most circuit designers attempt to compensate for the higher capacitance by using larger driver transistors to increase the drive current and improve the performance. This solution increases power consumption and does not advantageously enhance semiconductor device characteristics.